INVESTIGATION OF FLIP-FLOP PERFORMANCE ON DIFFERENT TYPE AND ARCHITECTURE IN SHIFT REGISTER WITH PARALLEL LOAD APPLICATIONS

Register is one of the computer components that have a key role in computer organisation. Every computer contains millions of registers that are manifested by flip-flop. This research focuses on the investigation of flip-flop performance based on its type (D, T, S-R, and J-K) and architecture (structural, behavioural, and hybrid). Each type of flip-flop on each architecture would be tested in different bit of shift register with parallel load applications. The experiment criteria that will be assessed are power consumption, resources required, memory required, latency, and efficiency. Based on the experiment, it could be shown that D flip-flop and hybrid architecture showed the best performance in required memory, latency, power consumption, and efficiency. In addition, the experiment results showed that the greater the register number, the less efficient the system would be

Analysis of Channel Coding Performance in OFDM Technique for Underwater Acoustic Communication System

One way to increase the performance of Orthogonal Frequency Division Multiplexing System (OFDM) system is by adding a channel coding (error correction code) in order to detect and correct errors that occur when sending data.At communication of acoustic underwater channel coding is required because of the characteristics of the channel bottom water is much different compared with the air channel and errors are likely to occur.In this research it was made simulation of acoustic underwater communication system with OFDM applied channel codingin which using Hamming code (7,4) and Hamming code (15,11) that is able to correct one error and detect two errors then BCH code capable to correct two errors for BCH (15,7) and correct 9 errors forBCH (127,64) and Reed Solomon code able to correct two errors for RS (15,11) and correct 8 errors for RS (31,15). Results of the study confirm the better performance when system usesOFDM with BCH Code (127.64) than other codes that are used, starting from 1 decibel (dB) to 3 dB for the performance of BER as10 -3 on Additive Gaussian White Noise (AWGN) channel while at the multipath channel, the performance of Bit Error Rate (BER) got better result on 1 dB up to 8 dB for BER performance as10 -3.Keyword: Underwater, Orthogonal Frequency Division Multiplexing (OFDM), channel codin

PERFORMANCE COMPARISON OF USART COMMUNICATION BETWEEN REAL TIME OPERATING SYSTEM (RTOS) AND NATIVE INTERRUPT

Comunication between microcontrollers is one of the crucial point in embedded sytems. On the other hand, embedded system must be able to run many parallel task simultaneously. To handle this, we need a reliabe system that can do a multitasking without decreasing every task’s performance. The most widely used methods for multitasking in embedded systems are using Interrupt Service Routine (ISR) or using Real Time Operating System (RTOS). This research compared perfomance of USART communication on system with RTOS to a system that use interrupt. Experiments run on two identical development board XMega A3BU-Xplained which used intenal sensor (light and temperature) and used servo as external component. Perfomance comparison done by counting ping time (elapsing time to transmit data and get a reply as a mark that data has been received) and compare it. This experiments divided into two scenarios: (1) system loaded with many tasks, (2) system loaded with few tasks. Result of the experiments show that communication will be faster if system only loaded with few tasks. System with RTOS has won from interrupt in case (1), but lose to interrupt in case (2)